External signals of the CPC/CPC+ and KC Compact

This document describes the external signals available from the external connectors of the CPC/CPC+ and KC Compact systems.

The signals are listed in alphabetical order. Signals which have a "/" prefix are "active-low".

Expansion Connector Signals

More information for signals which are inputs to the CPU or outputs from the CPU can be found by reading other documents or datasheets about the Z80 CPU.

+5V (5V power)

+5V power. The CPC power output is not able to supply many peripherals.This power output should be used to power IC's and used as a signal reference only.

φ

4Mhz Clock

A15-A0 (Address bus; Output from CPU)

A15-A0 form a 16-bit address. A15-A0 are used to specify a memory address or a I/O address.

/BUSAK (Bus Acknowledge; Output from CPU)

When /BUSAK="0" the CPU is signalling that control of the address bus, data bus and output signals has been released, and the device can take control.

/BUS RESET (Bus Reset; Input to ???)

??

/BUSRQ (Bus Request; Input to CPU)

When /BUSRQ="0" a device is requesting control of the address bus, data bus and the CPU's output signals. At the end of the current instruction cycle, the CPU will issue a Bus Acknowledge.

CURSOR (Cursor; Output from CRTC)

When CURSOR="1" the CRTC is displaying the cursor.

D7-D0 (Data bus; Input to CPU/Output from CPU)

D7-D0 form 8-bit data.

• In a I/O operation, D7-D0 are used to transfer data to/from a I/O device.
• In a memory operation, D7-D0 are used to transfer data to/from memory.
• In an interrupt request operation, D7-D0 are used to specify part of an interrupt response vector.

/EXP (Expansion device connected; Input to PPI)

The function of this signal can be used by a device to signal it's presence, it does this by setting this signal to "0". This signal is connected to bit 5 of PPI port B. This signal can be reprogrammed as input or output using the PPI, and can therefore be used as a general purpose input/output.

Gnd (Signal Ground)

Signal Ground. This can be used as a signal reference and as the Gnd connection to IC's.

/HALT (Halt; Output from CPU)

When /HALT="0" the CPU has executed a "HALT" instruction. The CPU will execute "NOP" instructions until a interrupt request is received and interrupts are not masked.

/INT (Interrupt Request; Input to CPU)

This is the maskable interrupt input to the CPU.

When /INT="0" a interrupt request is signalled to the CPU.

If interrupts are masked, the interrupt request is ignored.

If interrupts are not masked, the interrupt request will be acknowledged.

In the CPC, the interrupts are generated by the Gate-Array. In the CPC+, the interrupts are generated by the ASIC. In the KC Compact, the interrupts are generated by the Z8536 CIO.

/IORQ (Input/Output Request; Output from CPU)

When /IORQ="0" there are two possible functions:

1. Interrupt acknowledge: /M1="0".
2. I/O operation (read or write): /M1="1", /WR="0" OR /RD="0".

The interrupt acknowledge function is used to indicate that the interrupting device can put a interrupt vector into D7-D0.

The I/O operation is used to read from/write to a I/O device.

When the CPU is performing a I/O operation, A15-A0 will contain the I/O address.

1. If /RD is "0" then the operation is reading from a I/O device. D7-D0 will contain data read from the selected device.
2. If /WR is "0" then the operation is writing to a I/O device. D7-D0 contain data to write to the selected device.

L.PEN (Light Pen trigger; Input to CRTC)

A low-to-high ("0" to "1") transition on this signal will cause the CRTC to store the current memory address (CRTC MA signal) it has generated. The CRTC memory address can be used to calculate the position of a light-pen/light-gun on the screen.

/M1 (Machine cycle one; Output from CPU)

When /M1="0" there are two possible functions:

1. Interrupt acknowledge: /IORQ="0"
2. CPU is fetching the op-code part of an instruction: /MREQ="0" and /IORQ="1"

/MREQ (Memory Request; Output from CPU)

When /MREQ="0" the CPU is performing a memory operation. A15-A0 contain the memory address.

1. If /RD is "0" then the operation is reading from memory. D7-D0 will contain data read from the memory.
2. If /WR is "0" then the operation is writing to memory. D7-D0 contain data to write to the memory.

/NMI (Non-Maskable Interrupt; Input to CPU)

When there is a negative-edge on this signal (signal changes from "1" to "0"), this will force the CPU to execute the non-maskable interrupt service routine at &0066. This interrupt can't be masked and has a higher priority than /INT.

RAMDIS (Internal RAM Disable; Input to Internal RAM)

When RAMDIS="1" the internal RAM of the CPC/CPC+/KC Compact is forced inactive. e.g. a ram-expansion device would use this signal to override the internal RAM selection with the ram on the device. The internal RAM would be forced inactive, and the ram on the ram-expansion would be actived.

/RAMRD (Ram Read; Output from Gate-Array)

When /RAMRD="0" a ram read operation is active. This signal is generated by the Gate-Array. This signal will be "0" when:

• A15=A14="0" and bit 2 of the Gate-Array rom configuration register is set to 1. (lower rom disable)
• A15=A14="1" and bit 3 of the Gate-Array rom configuration register is set to 1. (upper rom disable)
• A15 is not equal to A14.

/RD (Read; Output from CPU)

When /RD="0" the CPU is performing a read operation. The operations are:

1. Reading from a I/O device: (/IORQ="0", A15-A0 contain I/O address)
2. Reading from memory (/MREQ="0", A15-A0 contain memory address)

/RESET (Reset; Input to CPU)

When /RESET="0" the CPU is held in the reset state. When the reset state is released, the CPU Program Counter (PC) is set to "0" and execution begins resumes from the new PC address.

/RFSH (Refresh; Output from CPU)

When /RFSH="0" and /MREQ="0" this indicates that A6-A0 contain a refresh memory address that can be used to refresh the memory

ROMDIS (Internal ROM Disable; Input to internal ROM)

When ROMDIS="1" the internal ROM of the CPC/CPC+/KC Compact is forced inactive. e.g. a rom-board device would use this signal to override the ROM selection with a rom plugged into the device. The internal ROM would be forced inactive, and the selected expansion rom would be activated.

/ROMEN (ROM Enable; Output from Gate-Array)

When /ROMEN="0" a rom read operation is active. This signal is generated by the Gate-Array. This signal will be "0" when:

• A15=A14="0" and bit 2 of the Gate-Array rom configuration register is set to 0, (lower rom enable)
• A15=A14="1" and bit 3 of the Gate-Array rom configuration register is set to 0. (upper rom enable)

A expansion device (e.g. a rom-board) can use this signal to activate the selected rom plugged into the device.

Sound (Mono Audio; Output from PSG)

This is a mono audio signal generated by mixing the 3 PSG audio channels together.

/WAIT (Wait; Input to CPU, Output from Gate-Array)

When /WAIT="0" this signal is used to delay memory or I/O access by the CPU. This signal is used to force the CPU to access memory or I/O when it is ready. This signal is generated by the Gate-Array.

/WR (Write; Output from CPU)

When /WR="0" the CPU is performing a write operation. The operations are:

1. Writing to a I/O device: (/IORQ="0", A15-A0 contain I/O address)
2. Writing to memory (/MREQ="0", A15-A0 contain memory address)

Disk drive 2 Connector Signals (CPC664/CPC6128/CPC6128+)

/DRIVE SELECT 0 (Drive select 0; Input to FDD)

When /DRIVE SELECT 0="0", the drive identified as "0" is selected. Disc operations will act on this drive.

/DRIVE SELECT 1 (Drive select 1; Input to FDD)

When /DRIVE SELECT 1="0", the drive identified as "1" is selected. Disc operations will act on this drive.

INDEX (Index; Output from FDD)

When there is a pulse on this signal (e.g. high->low->high) this identifies the physical start of a track on the floppy disc.

The FDC uses this signal as synchronision for the format and read track commands.

This signal is used to identify the start of a track on the disc and is generated from a physical mechanism inside the disc drive.

In 3" disc drives, the index pulse is detected using a red light. The red light transmitter is at the top and the detector is at the bottom. If a disc is inserted it sits between the transmitter and receiver. If the light is detected, INDEX will be "0" otherwise INDEX will be "1". The 3" discs have two holes. A circular hole in the hard disc casing, and a circular hole in the thin magnetic disc media. When these two holes line up, the light can pass through and is detected, otherwise the light cannot be detected.

In 3.5" disc drives, an alternative method is used. These disc drives have a circular disc on the underneath of the drive which is attached direct to the motor. This disc has a "marker" fixed at one point on the perimeter of the circular disc. When the motor is active, the circular disc spins and the "marker" passes through or past a detector. When the "marker" is detected INDEX will be "0" otherwise INDEX will be "1".

The disc drive will generate a index pulse when the following conditions are true:

• a disc is in the disc drive
• the disc drive motor is active

/MOTOR ON (Motor On; Input to FDD)

When /MOTOR ON="0" this signals the selected disc drive(s) to active their motor.

READ DATA (Read data; Output from FDD)

This signal represents the data output from the selected floppy disc drive(s).

/READY (Disc Drive Ready; Output from FDD)

When /READY="0" the selected disc drive(s) are ready for a read or write operation. The conditions that cause a disc drive to be ready are:

• the floppy disc drive is selected,
• the floppy disc drive motor is on,
• a floppy disc has been inserted into the floppy disc drive,
• the disc motor is rotating at a constant speed (300rpm)

SIDE SELECT (Side select; Input to FDD)

This signal is used to select the side to read to/write from.

• When SIDE SELECT="0", side 1 (upper read/write head) is selected,
• When SIDE SELECT="1", side 0 (lower read/write head) is selected

STEP (Step; Input to FDD)

This signal is used to perform the step in the direction defined by DIRECTION SELECT. Step is pulsed low (e.g. high-to-low-to-high) for each step. The read/write head of the selected floppy disc drive(s) will then step. DIRECTION SELECT must be setup before STEP is pulsed.

/TRACK 0 (Track 0; Output from FDD)

When /TRACK 0="0" the read/write head of the selected floppy disc drive(s) is positioned over track 0.

WRITE DATA (Write Data; Input to FDD)

This signal represents the data input to the selected floppy disc drive(s). The data will be written to selected drive(s) ONLY

WRITE GATE (Write Gate; Input to FDD)

• When WRITE GATE = "0" this will cause the selected floppy disc drive(s) to start writing data. The data is supplied by WRITE DATA

/WRITE PROTECT (Write protected; Output from FDD)

• When /WRITE PROTECT="0" the floppy disc in the selected floppy disc drive(s) is write protected.
• When /WRITE PROTECT="1" the floppy disc in the selected floppy disc drive(s) is write enabled.