Ram management

In the CPC464, CPC664 and KC compact, ram management is performed by a ram expansion device. In the CPC6128 ram management is performed by a PAL IC on the main PCB or by an expansion device. In the CPC464+ and CPC6128+ ram management is performed by the ASIC or by an expansion device.

When a ram expansion is used with the CPC6128,CPC464+ and CPC6128+ this normally has priority over the internal ram management.

This document will list the common ram expansions for these systems, and will describe the expansion signals available for ram managment devices to use.

Dk'Tronics, Amstrad, Dobbertin and XXXX Ram Expansions

Overview

These ram expansions all use the same design.

• The memory is divided into 64K logical blocks
• Each block is split into 16k logical sub-blocks.
• The memory is split into a single "primary" block and multiple "secondary" blocks. (The primary block is the internal 64k ram of the CPC464,CPC664 and KC compact, or the first 64k of the CPC6128 ram. The secondary block can be chosen from the expansion ram available.)

  The memory selection hardware in the CPC6128,CPC464+ and CPC6128+ act the same as a CPC464/CPC664/KC compact with a 64K ram expansion.

• Different combinations of primary and secondary ram can be made visible in the Z80 address space.
• The ram paging register is accessed by I/O writes.
• Normally the CPC runs with ram configuration 0.
• The CRTC can only display graphics from the primary 64k block.

The ram paging register is accessed when bit 15 of I/O address is set to "0". This register is write only and cannot be read. This register shares the same I/O address decoding as the Gate-Array, but uses a unused function to avoid conflict.

When Bit 7 and 6 of the data written is set to "1", bits 5-0 define the configuration. With some ram expansions, the configuration may not be decoded fully, therefore the same configuration may be selected by writing more than one value to the ram selection port.

Up to 512K of additional ram may be used with this method, giving 576K in total (512K expansion ram and 64K base ram).

RAM Configurations

There are 8 different ram configurations which work on the currently selected 64k logical block.

The following tables show the possible ram configurations. A "*" identifies a sub-block which is a member of the currently selected secondary 64k block, otherwise the sub-block is a member of the primary 64k block.

Blocks are numbered 0 to 3, corresponding to the the following ranges within each 64k block: &0000-&3fff,&4000-&7fff,&8000-&BFFF and &C000-&FFFF.

Configuration "0":

Z80 Memory Range	Sub-block
&0000-&3fff	0
&4000-&7fff	1
&8000-&bfff	2
&c000-&ffff	3

Configuration "1":

Z80 Memory Range	Sub-block
&0000-&3fff	0
&4000-&7fff	1
&8000-&bfff	2
&c000-&ffff	3*

Configuration "2":

Z80 Memory Range	Sub-block
&0000-&3fff	0*
&4000-&7fff	1*
&8000-&bfff	2*
&c000-&ffff	3*

Configuration "3":

Z80 Memory Range	Sub-block
&0000-&3fff	0
&4000-&7fff	3
&8000-&bfff	2
&c000-&ffff	3*

Configuration "4":

Z80 Memory Range	Sub-block
&0000-&3fff	0
&4000-&7fff	0*
&8000-&bfff	2
&c000-&ffff	3

Configuration "5":

Z80 Memory Range	Sub-block
&0000-&3fff	0
&4000-&7fff	1*
&8000-&bfff	2
&c000-&ffff	3

Configuration "6"

Z80 Memory Range	Sub-block
&0000-&3fff	0
&4000-&7fff	2*
&8000-&bfff	2
&c000-&ffff	3

Configuration "7":

Z80 Memory Range	Sub-block
&0000-&3fff	0
&4000-&7fff	3*
&8000-&bfff	2
&c000-&ffff	3

Details for specific implementations

Key:

• "-" - this bit is ignored. The value of this bit is not important.
• "0" - this bit must be set to "0"
• "1" - this bit must be set to "1"
• "b0,b1,b2" - this bit is used to define the logical 64k block that the ram configuration uses
• "s0,s1,s2" - this bit is used to define the ram configuration

Notes:

1. The CPC6128 has a 64k ram expansion built-in, giving 128K of RAM in this system.
2. In the CPC464,CPC664 and KC compact if a ram expansion is not present, then writing to this port has no effect and the ram will be in the same arrangement as if configuration 0 had been selected.

Vortex

Details to follow..

Signals used for Ram management

RAMDIS (Internal RAM Disable; Input to Internal RAM)

When RAMDIS="1" the internal RAM of the CPC/CPC+/KC Compact is forced inactive. e.g. a ram-expansion device would use this signal to override the internal RAM selection with the ram on the device. The internal RAM would be forced inactive, and the ram on the ram-expansion would be actived.

/RAMRD (Ram Read; Output from Gate-Array)

When /RAMRD="0" a ram read operation is active. This signal is generated by the Gate-Array. This signal will be "0" when:

• A15=A14="0" and bit 2 of the Gate-Array rom configuration register is set to 1. (lower rom disable)
• A15=A14="1" and bit 3 of the Gate-Array rom configuration register is set to 1. (upper rom disable)
• A15 is not equal to A14.